报 告 人：Hans-Joachim Wunderlich 教授
Hans-Joachim Wunderlich is a full professor at the University of Stuttgart. He studied Mathematics and Philosophy at the Universities of Konstanz and Freiburg, Germany, and received his PhD degree (Dr. rer. nat.) from the University of Karlsruhe in 1986. Since then, he has worked as a professor at the universities of Karlsruhe, Duisburg, Siegen and Stuttgart. For more than 32 years, Prof. Wunderlich contributed to the areas of VLSI testing, Design for Test, Dependability, Design Automation, Fault Tolerance and Approximate Computing. He published around 300 books and articles in these fields, and led numerous projects funded by industry, European Commission, German government or national funding organizations like DFG. Prof. Wunderlich was recipient of the award for excellent academic teaching of the state of Baden-Württemberg, was promoted Golden Core Member of the IEEE Computer Society, and was elevated Fellow of the IEEE.
Today’ complex semiconductor systems require extensive infrastructure and instrumentation to ensure safe and reliable operation. The instruments include temperature and power sensors, error and aging monitors, self-checking and self-testing hardware like checkers and linear feedback shift registers (LFSRs) or scan chains and debug units. All these instruments have to be accessible all over the lifetime of a systems, and for this purpose reconfigurable scan networks (RSNs) are standardized under IEEE 1687 or 1149.1-2013. RSNs may comprise 100.000s of flipflops and show an extraordinary sequential depths which render standard methods for simulation, verification, and test inefficient. In addition, they may allow unwanted external access to internal information forming security threats.
The lecture will introduce new modeling techniques for complex RSNs which allow an optimal operation with respect to test time. Moreover, the modeling techniques are the basis for efficient test generation and verification of RSNs with respect to both functionality and security.